from linaro tcwg ci:
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:93:45: warning: equality comparison with extraneous parentheses [-Wparentheses-equality]
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:93:45: note: remove extraneous parentheses around the comparison to silence this warning
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ~ ^ ~
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:93:45: note: use '=' to turn this equality comparison into an assignment
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ^~
00:00:35 =
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:166:45: warning: equality comparison with extraneous parentheses [-Wparentheses-equality]
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:166:45: note: remove extraneous parentheses around the comparison to silence this warning
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ~ ^ ~
00:00:35 arch/arm/lib/uaccess_with_memcpy.c:166:45: note: use '=' to turn this equality comparison into an assignment
00:00:35 if ((((current_thread_info()->addr_limit)) == (0x00000000))) {
00:00:35 ^~
00:00:35 =
00:00:35 2 warnings generated.
So all of these warnings that got filed appear to be from preprocessed sources (this is expanded from uaccess_kernel()). How do I reproduce this and how should it be fixed?
Relevant bits:
https://elixir.bootlin.com/linux/v5.1-rc3/source/arch/arm/lib/uaccess_with_memcpy.c#L93
https://elixir.bootlin.com/linux/v5.1-rc3/source/include/linux/uaccess.h#L9
https://elixir.bootlin.com/linux/v5.1-rc3/source/arch/arm/include/asm/uaccess.h#L66
https://elixir.bootlin.com/linux/v5.1-rc3/source/arch/arm/include/asm/uaccess.h#L82
I was using the report from:
https://ci.linaro.org/job/tcwg_kernel-bisect-llvm-master-arm-mainline-allmodconfig/15/
which by the name alone seems to imply arm (32b) allmodconfig.
If these are not reproducible, feel free to close.
Ah, I remember why this happens. It's a ccache bug, as we ran into this with our own CI:
ccache no longer passes preprocessor options like -D and -I to the compiler when compiling preprocessed output. This fixes warnings emitted by Clang.
https://ccache.dev/releasenotes.html#_ccache_3_2
https://travis-ci.com/ClangBuiltLinux/continuous-integration/builds/89768767 vs. https://travis-ci.com/ClangBuiltLinux/continuous-integration/builds/89763935
Ideally, Linaro should fix this by updating their ccache binary. I don't know how feasible that is but there is nothing for us to fix here so closing.
yep, that will do it, thanks for recalling that this issue has been seen before!
Linaro TCWG uses ubuntu:xenial docker containers for these builds, which have old enough ccache 3.2.4.
docker run --rm --entrypoint /usr/bin/ccache linaro/ci-amd64-tcwg-build-ubuntu:xenial --version
ccache version 3.2.4
Odd. Maybe it wasn't fully fixed until a later version. All I know is it is ccache related because we upgraded to the latest between builds and that resolved the slew of warnings.
What ccache version works for you?
I know that ccache 3.3.4 worked when we were using Debian stretch as our base.
I've switched Linaro TCWG kernel CI to use ubuntu:bionic with ccache 3.4.1. Let's see how it'll go.
Most helpful comment
I've switched Linaro TCWG kernel CI to use ubuntu:bionic with ccache 3.4.1. Let's see how it'll go.