Joss-reviews: [PRE REVIEW]: CircuitGraph: A Python package for Boolean circuits

Created on 31 Aug 2020  路  35Comments  路  Source: openjournals/joss-reviews

Submitting author: @jpsety (Joseph Sweeney)
Repository: https://github.com/circuitgraph/circuitgraph
Version: v0.0.1
Editor: @danielskatz
Reviewers: @skadio, @prw99r, @r-a-hoggarth
Managing EiC: Kristen Thyng

:warning: JOSS reduced service mode :warning:

Due to the challenges of the COVID-19 pandemic, JOSS is currently operating in a "reduced service mode". You can read more about what that means in our blog post.

Author instructions

Thanks for submitting your paper to JOSS @jpsety. Currently, there isn't an JOSS editor assigned to your paper.

The author's suggestion for the handling editor is @mjsottile.

@jpsety if you have any suggestions for potential reviewers then please mention them here in this thread (without tagging them with an @). In addition, this list of people have already agreed to review for JOSS and may be suitable for this submission (please start at the bottom of the list).

Editor instructions

The JOSS submission bot @whedon is here to help you find and assign reviewers and start the main review. To find out what @whedon can do for you type:

@whedon commands
Coq Makefile Python pre-review

All 35 comments

Hello human, I'm @whedon, a robot that can help you with some common editorial tasks.

:warning: JOSS reduced service mode :warning:

Due to the challenges of the COVID-19 pandemic, JOSS is currently operating in a "reduced service mode". You can read more about what that means in our blog post.

For a list of things I can do to help you, just type:

@whedon commands

For example, to regenerate the paper pdf after making changes in the paper's md or bib files, type:

@whedon generate pdf
Reference check summary (note 'MISSING' DOIs are suggestions that need verification):

OK DOIs

- 10.1007/978-3-319-94144-8_26 is OK

MISSING DOIs

- None

INVALID DOIs

- None
Software report (experimental):

github.com/AlDanial/cloc v 1.84  T=8.40 s (14.3 files/s, 72547.0 lines/s)
-----------------------------------------------------------------------------------
Language                         files          blank        comment           code
-----------------------------------------------------------------------------------
Verilog-SystemVerilog               69            309            195         587275
HTML                                20           1626              0          14896
Python                              19            621           1130           2125
Mako                                 6            142              6           1103
Markdown                             2             44              0            152
TeX                                  1              4              0             25
make                                 1              6              2             14
YAML                                 2              0              0             12
-----------------------------------------------------------------------------------
SUM:                               120           2752           1333         605602
-----------------------------------------------------------------------------------


Statistical information for the repository '2615' was gathered on 2020/08/31.
The following historical commit information, by author, was found:

Author                     Commits    Insertions      Deletions    % of changes
Joe                              1           224             96            1.97
Joe Sweeney                     41          6359           3722           62.08
Ruben Purdy                     33          3386           2451           35.95

Below are the number of rows from each author that have survived and are still
intact in the current revision:

Author                     Rows      Stability          Age       % in comments
Joe Sweeney                2271           35.7          0.9               10.57
Ruben Purdy                1605           47.4          0.5                3.36

Hi @danielskatz would you be up for editing this submission?

@whedon invite @danielskatz as editor

@danielskatz has been invited to edit this submission.

@whedon assign me as editor

OK, the editor is @danielskatz

馃憢 @jpsety - I hope you can help me by suggesting some possible reviewers...

If you have any suggestions for potential reviewers, then please mention them here in this thread (without tagging them with an @).

In addition, this list of people have already agreed to review for JOSS and may be suitable for this submission (please start at the bottom of the list).

Looking through the list its sparse for hardware people, but maybe:
julianstirling
skadio
reality

If you have suggestions from outside the list, including potential users, that would be great too!

馃憢 @julianstirling, @skadio, @reality - Are one or two of you willing to review this submission for JOSS?

I am a hardware person, but I have very little FPGA experience which I think this project needs. Rowan Hoggarth at Imperial would have the correct experience I would think.

Rowan has agreed to review, so I will add him shortly, and now need to find a second reviewer.

Hi, apologies, but I think I also don't have the correct expertise.

Also: my association with hardware may be incorrect. I have little experience there!

Zeye Liu at Intel might be a good fit. DexterDinny is his username

Not a hardware person here, from Boolean circuits/SAT perspective I can provide a review for this with the exception that the next few weeks is tricky for me.

I might have misspoke, a hardware background isn't necessary. Really a Boolean circuits/SAT perspective is what is best.

Hardware/fpga background would be good to create "interesting" circuits I guess, but, at a second look, this would be a good fit for me. I vaguely remember my Karnaugh maps and logical circuit design.

Quick question:

I am about to submit a paper to JOSS from our research group. Any conflict of interest I should be declaring? I checked the Ethics Guideline with no immediate concern but worth double-checking about serving as a reviewer and in parallel having an (unrelated) submission under review.

Could also try Frank Seifert very experienced electrical engineer with FPGA and Python experience.

@skadio - thanks. There is no conflict between submitting and reviewing. I'll add you as a reviewer, and once I get some info from Rowan, I'll also add him and we can start the review. Don't worry about the time, if it takes a few weeks, that's ok. We normally try to get reviews done in 3 weeks, but with Covid, some are taking longer...

@whedon assign @skadio as reviewer

OK, @skadio is now a reviewer

@whedon commands

Here are some things you can ask me to do:

# List Whedon's capabilities
@whedon commands

# List of editor GitHub usernames
@whedon list editors

# List of reviewers together with programming language preferences and domain expertise
@whedon list reviewers

EDITORIAL TASKS

# Compile the paper
@whedon generate pdf

# Compile the paper from alternative branch
@whedon generate pdf from branch custom-branch-name

# Ask Whedon to check the references for missing DOIs
@whedon check references

# Ask Whedon to check repository statistics for the submitted software
@whedon check repository

@danielskatz quick q: do you know how can I get the Review Checklist displayed here. I could not see a whedon command but may it's related to the review tag/stage

yes, it will appear when we start the review - but you can also see https://joss.readthedocs.io/en/latest/review_checklist.html

@whedon add @prw99r as reviewer

OK, @prw99r is now a reviewer

@whedon add @r-a-hoggarth as reviewer

OK, @r-a-hoggarth is now a reviewer

馃憢 @prw99r & @r-a-hoggarth - thanks for agreeing to review - I've added you, and we'll now start the review, which will be in a different issue

@whedon start review

OK, I've started the review over in https://github.com/openjournals/joss-reviews/issues/2646.

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