Zig: Proposal: Rename SIMD vectors

Created on 4 Dec 2020  路  5Comments  路  Source: ziglang/zig

7295 once again shows once again that most programmers associate the word vector with a linear algebra vector type and not with a SIMD vector.

I proposa a rename to SIMD array, but i'm open for other names. I'm pretty much happy with any name that is not vector, as it is more confusing than helping.

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For the type itself, we can simply use the name Simd (e.g. std.builtin.TypeInfo.Simd, std.meta.Simd).

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For the type itself, we can simply use the name Simd (e.g. std.builtin.TypeInfo.Simd, std.meta.Simd).

Why not just call them SIMD registers? Would also give it some synergy with the register keyword in C, as I assume you can't take the reference to a SIMD register or store it in a struct anyway.

I assume you can't take the reference to a SIMD register or store it in a struct anyway.

You can do this, it behaves more like __m128 from C. It can be stored in memory, and it's aligned to the appropriate alignment for fast access on your target platform. It's more like an array type but with support for parallel operations and more alignment.

I assume you can't take the reference to a SIMD register or store it in a struct anyway.

You can do this, it behaves more like __m128 from C. It can be stored in memory, and it's aligned to the appropriate alignment for fast access on your target platform. It's more like an array type but with support for parallel operations and more alignment.

Huh, that's sort of weird. I always thought that was one of the biggest mistakes with __m128. Unless you have many elements you are processing (i.e. an array) SIMD is basically pointless. And having an array of __m128 is just weird.

For the type itself, we can simply use the name Simd (e.g. std.builtin.TypeInfo.Simd, std.meta.Simd).

I think that would be the most fitting type. "It's a type that provides simultaneous operations on a range of data".

As @SpexGuy said, Simd types aren't Simd register equivalents and may be emulated if the hardware doesn't support it, but allows to express the intent to process the data in parallel if possible

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