Vamiga: Barbarian hacker intro bug

[dirkwhoffmann]

Findings: When the disk is dragged in after the disk & hand logo has shown up, the intro is scrambled:

DMA debugger view:

When the disk is inserted right from the start, it looks like this (red stripes are debug markers) :

Don't know what's going on here. Obviously, it must have something to do with the display window. Up to now, I thought the display window can only be modified by writing into DIWSTRT and DIWSTOP... 🤔

[dirkwhoffmann]

When writing to strobe register COPJMP1, Copper jumped to table 2 🤭. So mean of him.

But as always: For each captured bug, another one takes its place.

The left part of the moving text shouldn't be there and the first line is scrambled.

[dirkwhoffmann]

It's a little better now, but not perfect:

The problem here is that the intro modifies registers DDFSTRT, DDFSTOP, and BPLxPTR in the middle of a rasterline when DMA is still on. Hence, register timing is crucial here. I'm going to postpone this bug until the emulator is more mature (register timing is higher level sorcery 🧟‍♀️).

[dirkwhoffmann]

😯 I screwed it up completely. Some severe bug has been introduced lately. The animation is also gone.

[dirkwhoffmann]

Animation stopped with the introduction of function skipBPLxPT().

skipBPLxPT() is not the culprit though. Due to another bug, writes to BPLPT registers get falsely delayed to those cycles that are skipped by skipBPLxPT(). Hence, the other bug needs to be fixed (wherever it hides).

[dirkwhoffmann]

Findings:

• MOVE $0018, DFFSTRT happens at cycle $16.
  This is too late to let the new value take effect in the current raster line. Therefore, DDFSTRT is still at $38 and there is enough time to set the BPLPT registers outside the DMA area.

• In vAmiga, DMA is already on when the BPLPT registers are written.

[mithrendal]

This is better than rocket sience. 🚀

[dirkwhoffmann]

First time it really works 😎.

On the negative side, I'm pretty sure that my code changes break some of the DDF tests that passed before.

Anyway, the good news is that I understand DDFSTRT / DDFSTOP a little bit better now.

[dirkwhoffmann]

Oh no. It's broken again 🙈

[mithrendal]

Is it maybe the slow blitter which is still in its infancy ?

[dirkwhoffmann]

Is it maybe the slow blitter which is still in its infancy ?

Figured it out. It's because I changed the format of the internal DMA event table.

To make the slow Blitter work, I have to emulate wait-states inside the CPU. To do that, I need to

1. change the IRQ handling
2. trigger the hsync handler at the beginning of the next line and not at the end of the current.
3. modify the value of pos.h when it wraps over

Task 1. has been solved and brought the Musashi IRQ issue to surface (which is good).
Task 2. and 3. sound simple, but they aren't. All DMA stuff is tightly glued together like in a real Amiga. One sub-task is to change format of the internal DMA event table which caused the bug.