Antlr4: Parsing with C++ target 5x slower than Java

[olowo726]

I recently migrated a project from Java to C++. I built the C++ runtime with Visual Studio Community 2019 which I also use for everything else in the C++ project. All my tests passes which shows that the parsing itself works the same for both targets.

The actual parsing for C++ is about 5x slower than Java even though the C++ code is built with release configuration optimized for speed and Java is executed in Eclipse debug mode!

The files parsed in the tests are about 500k. I can provide the grammar and data to parse if needed.

Anyone with a clue on why and what can be done?

[ericvergnaud]

Hi,

the place for support is the google discussion group.

Cheers,

Le 30 juin 2019 à 16:48, olowo726 [e-mail] a écrit :

I recently migrated a project from Java to C++. I built the C++ runtime with Visual Studio Community 2019 which I also use for everything else in the C++ project. All my tests passes which shows that the parsing itself works the same for both targets.

The actual parsing for C++ is about 5x slower than Java even though the C++ code is built with release configuration optimized for speed and Java is executed in Eclipse debug mode!

The files parsed in the tests are about 500k. I can provide the grammar and data to parse if needed.

Anyone with a clue on why and what can be done?

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[olowo726]

Hi,

Perhaps I have misunderstood the purpose of this forum. I thought it was for bugs and improvement suggestions.

Well, for sure this isn't a total crash and neither does the C++ implementation fail to parse the data. But I still feel that when a C++ implementation is more than 5x slower than the Java one there is probably some issue lurking which deserves investigation. I doubt that this can be solved by using the tool differently, i.e. a code generation for or compiler flag.

Kind Regards,
Olof

[ericvergnaud]

Hi,

sorry for the tone, but you’re making a lot of assumptions.
Every target language comes with its strengths and weaknesses, and Antlr cannot therefore guarantee that the performance of a given grammar will be consistent across targets.
Using the tool differently may very well solve your problem.

Eric

Le 30 juin 2019 à 17:57, olowo726 [e-mail] a écrit :

Hi,

Perhaps I have misunderstood the purpose of this forum. I thought it was for bugs and improvement suggestions.

Well, for sure this isn't a total crash and neither does the C++ implementation fail to parse the data. But I still feel that when a C++ implementation is more than 5x slower than the Java one there is probably some issue lurking which deserves investigation. I doubt that this can be solved by using the tool differently, i.e. a code generation for or compiler flag.

Kind Regards,
Olof

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[KvanTTT]

I think GitHub tracker is the correct place for such and other performance issues. Especially, considering the fact that C++ runtime is 5x slower than Java one. There are many issues exist. C++ is a fast language compare to Python and JavaScript.

[ericvergnaud]

Sorry Ivan, but without a narrowed use case i.e. very small grammar that reproduces the issue and a profiler log, not sure anyone will look into this.
This slowdown could result from a poor grammar design, a compiler setting...

Le 30 juin 2019 à 19:20, Ivan Kochurkin [e-mail] a écrit :

I think GitHub tracker is the correct place for such and other performance issues. Especially, considering the fact that C++ runtime is 5x slower than Java one. There are many issues exist https://github.com/antlr/antlr4/issues?utf8=%E2%9C%93&q=is%3Aissue+is%3Aopen+performance. C++ is a fast language compare to Python and JavaScript.

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[Nic30]

I do have similar issue with this grammar
The grammar is complicated and contains all sort of problems (including many ambiguities, context sensitivity etc.). I am currently trying to find out where the issue is.

What is interesting is that even -O3 does not make parser as fast as java which seems to me as some bug in prediction cache or something and not just a compiler settings.

Just saying.

[alainmarcel]

Make sure you first try a SLL pass, and if it fails, then try the more expensive LL pass:

m_antlrParserHandler->m_ppparser =
new MyParser(m_antlrParserHandler->m_pptokens);
m_antlrParserHandler->m_ppparser->getInterpreter()
->setPredictionMode(atn::PredictionMode::SLL);
m_antlrParserHandler->m_ppparser->removeErrorListeners();
m_antlrParserHandler->m_ppparser->setErrorHandler(
std::make_shared());
try {
m_antlrParserHandler->m_pptree =
m_antlrParserHandler->m_ppparser->source_text();
} catch (ParseCancellationException& pex) {
m_antlrParserHandler->m_pptokens->reset();
m_antlrParserHandler->m_ppparser->reset();
m_antlrParserHandler->m_ppparser->addErrorListener(
m_antlrParserHandler->m_errorListener);
m_antlrParserHandler->m_ppparser->setErrorHandler(
std::make_shared());
m_antlrParserHandler->m_ppparser
->getInterpreter()
->setPredictionMode(atn::PredictionMode::LL);
m_antlrParserHandler->m_pptree =
m_antlrParserHandler->m_ppparser->source_text();
}

[Nic30]

Ah, this is so ugly, but it works somehow.

However there is a problem. In my test case the large files, which takes most of the time, usually require LL. Thus this will not bring any significant speedup for my test suite.

Anyway thanks for advice, it really affect the performance and may help someone.

[alainmarcel]

I have a fork of the Antlr 4.7.2 runtime that I optimized a bit, you can try it, it should be 2x faster:alainmarcel/Surelog

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alainmarcel/Surelog

System Verilog 2017 Pre-processor, Parser . Contribute to alainmarcel/Surelog development by creating an account...
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On Thursday, November 21, 2019, 08:34:17 AM PST, Nic30 <[email protected]> wrote:

Ah, this is so ugly, but it works somehow.

However there is a problem. In my test case the large files, which takes most of the time, usually require LL. Thus this will not bring any significant speedup for my test suite.

Anyway thanks for advice, it really affect the performance and may help someone.

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[Nic30]

Ah, I just tried https://github.com/verilator/verilator/blob/master/test_regress/t/t_altera_lpm.v and it was not ending in Surelog. But maybe I just executed something correctly. (I am expecting similar times to https://travis-ci.org/Nic30/hdlConvertor/jobs/615154920)
I do have to do some measurements on tomorrow and Thursday, some verifications on Monday,...
Did you integrated your tool to sv-tests?
I trying to find a time to actually finish the integration of mine tool https://github.com/SymbiFlow/sv-tests/pull/316 .
Maybe we could compare there.

BTW: you are doing something very similar, we should at least share the preprocessor. The whole thing takes ludicrous ammount of time.

I did add the reference on your project to readme in hdlConvertor https://github.com/Nic30/hdlConvertor/commit/01cb5904c3f99a93e400203567d014804fa62e55

[alainmarcel]

Looks to ok me, it is in my regression, it runs in ~12 seconds in single thread and 8s in multithread (preproc, parse, compilation, elaboration):
:~/Surelog/build$ dist/Release/surelog ../third_party/tests/Verilator/t_altera_lpm.v -verbose -parse [INFO :CM0023] Creating log file ./slpp_all/surelog.log.
[INFO :PP0122] Preprocessing source file "builtin.sv".
[INFO :PP0122] Preprocessing source file "../third_party/tests/Verilator/t_altera_lpm.v".
[INFO :PA0201] Parsing source file "builtin.sv".
[INFO :PA0201] Parsing source file "../third_party/tests/Verilator/t_altera_lpm.v".
[INFO :CP0300] Compilation...
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1375 Compile module "work@LPM_DEVICE_FAMILIES".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1265 Compile module "work@LPM_HINT_EVALUATION".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:60 Compile module "work@LPM_MEMORY_INITIALIZATION".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:3486 Compile module "work@lpm_abs".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2613 Compile module "work@lpm_add_sub".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1689 Compile module "work@lpm_and".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:6717 Compile module "work@lpm_bipad".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1979 Compile module "work@lpm_bustri".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2328 Compile module "work@lpm_clshift".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2819 Compile module "work@lpm_compare".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1585 Compile module "work@lpm_constant".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:3550 Compile module "work@lpm_counter".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2200 Compile module "work@lpm_decode".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:3279 Compile module "work@lpm_divide".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:3960 Compile module "work@lpm_ff".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:5415 Compile module "work@lpm_fifo".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:6482 Compile module "work@lpm_fifo_dc".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:6045 Compile module "work@lpm_fifo_dc_async".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:5746 Compile module "work@lpm_fifo_dc_dffpipe".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:5837 Compile module "work@lpm_fifo_dc_fefifo".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:6605 Compile module "work@lpm_inpad".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1636 Compile module "work@lpm_inv".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:3836 Compile module "work@lpm_latch".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2993 Compile module "work@lpm_mult".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:2065 Compile module "work@lpm_mux".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1769 Compile module "work@lpm_or".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:6661 Compile module "work@lpm_outpad".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:4641 Compile module "work@lpm_ram_dp".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:4383 Compile module "work@lpm_ram_dq".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:4934 Compile module "work@lpm_ram_io".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:5198 Compile module "work@lpm_rom".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:4179 Compile module "work@lpm_shiftreg".
[INFO :CP0303] ../third_party/tests/Verilator/t_altera_lpm.v:1850 Compile module "work@lpm_xor".
[INFO :CP0302] builtin.sv:4 Compile class "work@mailbox".
[INFO :CP0302] builtin.sv:33 Compile class "work@process".
[INFO :CP0302] builtin.sv:58 Compile class "work@semaphore".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:3488 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:2623 Implicit port type (wire) for "result",there are 2 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:1691 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:6721 Implicit port type (wire) for "pad".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:1980 Implicit port type (wire) for "tridata".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:2337 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:2827 Implicit port type (wire) for "alb",there are 5 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:1586 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:3568 Implicit port type (wire) for "q",there are 2 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:2206 Implicit port type (wire) for "eq".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:3285 Implicit port type (wire) for "quotient",there are 1 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:3978 Implicit port type (wire) for "q".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:5421 Implicit port type (wire) for "q",there are 3 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:6488 Implicit port type (wire) for "rdfull",there are 6 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:6051 Implicit port type (wire) for "rdfull",there are 6 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:5842 Implicit port type (wire) for "empty",there are 1 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:3001 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:2071 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:1771 Implicit port type (wire) for "result".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:4651 Implicit port type (wire) for "q".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:4389 Implicit port type (wire) for "q".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:4934 Implicit port type (wire) for "dio".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:5203 Implicit port type (wire) for "q".
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:4190 Implicit port type (wire) for "q",there are 1 more instances of this message.
[NOTE :CP0309] ../third_party/tests/Verilator/t_altera_lpm.v:1852 Implicit port type (wire) for "result".
[INFO :EL0526] Design Elaboration...
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1585 Top level module "work@lpm_constant".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1636 Top level module "work@lpm_inv".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1689 Top level module "work@lpm_and".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1769 Top level module "work@lpm_or".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1850 Top level module "work@lpm_xor".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:1979 Top level module "work@lpm_bustri".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2065 Top level module "work@lpm_mux".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2200 Top level module "work@lpm_decode".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2328 Top level module "work@lpm_clshift".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2613 Top level module "work@lpm_add_sub".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2819 Top level module "work@lpm_compare".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:2993 Top level module "work@lpm_mult".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:3279 Top level module "work@lpm_divide".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:3486 Top level module "work@lpm_abs".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:3550 Top level module "work@lpm_counter".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:3836 Top level module "work@lpm_latch".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:3960 Top level module "work@lpm_ff".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:4179 Top level module "work@lpm_shiftreg".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:4383 Top level module "work@lpm_ram_dq".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:4641 Top level module "work@lpm_ram_dp".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:4934 Top level module "work@lpm_ram_io".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:5198 Top level module "work@lpm_rom".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:5415 Top level module "work@lpm_fifo".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:6482 Top level module "work@lpm_fifo_dc".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:6605 Top level module "work@lpm_inpad".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:6661 Top level module "work@lpm_outpad".
[NOTE :EL0503] ../third_party/tests/Verilator/t_altera_lpm.v:6717 Top level module "work@lpm_bipad".
[NOTE :EL0504] Multiple top level modules in design.
[NOTE :EL0508] Nb Top level modules: 27.
[NOTE :EL0509] Max instance depth: 4.
[NOTE :EL0510] Nb instances: 120.
[NOTE :EL0511] Nb leaf instances: 65.
[  FATAL] : 0[ SYNTAX] : 0[  ERROR] : 0[WARNING] : 0[   NOTE] : 57

I'm pretty much done with the preprocessor.I pass all the Verilator, Yosys, and all tests I could find out there (see my regression third_party/tests)
I'm about to be integrated in sv-tests.
I'll copy your reference section from your README and reference you too! Thanks for pointing that out.

On Thursday, November 21, 2019, 1:56:17 PM PST, Nic30 <[email protected]> wrote:

Ah, I just tried https://github.com/verilator/verilator/blob/master/test_regress/t/t_altera_lpm.v and it was not ending in Surelog. But maybe I just executed something correctly.
I do have to do some measurements on tomorrow and Thursday, some verifications on Monday,...
Did you integrated your tool to sv-tests?
I trying to find a time to actually finish the integration of mine tool SymbiFlow/sv-tests#316 .
Maybe we could compare there.

BTW: you are doing something very similar, we should at least share the preprocessor. The whole thing takes ludicrous ammount of time.

I did add the reference on your project to readme in hdlConvertor Nic30/hdlConvertor@01cb590

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